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author | Denys Vlasenko | 2022-02-09 01:50:22 +0100 |
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committer | Denys Vlasenko | 2022-02-09 01:50:22 +0100 |
commit | caa9c4f707b661cf398f2c2d66f54f5b0d8adfe2 (patch) | |
tree | 409b19128aa7bc1a512fa126f22f1a3e9344d8ae | |
parent | 11bcea7ac0ac4b2156c1b2d53f926d789b9792b4 (diff) | |
download | busybox-caa9c4f707b661cf398f2c2d66f54f5b0d8adfe2.zip busybox-caa9c4f707b661cf398f2c2d66f54f5b0d8adfe2.tar.gz |
libbb/sha256: code shrink in x86 assembly
function old new delta
sha256_process_block64_shaNI 32-bit 676 673 -3
sha256_process_block64_shaNI 64-bit 680 677 -3
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
-rw-r--r-- | libbb/hash_md5_sha256_x86-32_shaNI.S | 11 | ||||
-rw-r--r-- | libbb/hash_md5_sha256_x86-64_shaNI.S | 11 |
2 files changed, 10 insertions, 12 deletions
diff --git a/libbb/hash_md5_sha256_x86-32_shaNI.S b/libbb/hash_md5_sha256_x86-32_shaNI.S index 846230e..aa68193 100644 --- a/libbb/hash_md5_sha256_x86-32_shaNI.S +++ b/libbb/hash_md5_sha256_x86-32_shaNI.S @@ -39,13 +39,12 @@ .balign 8 # allow decoders to fetch at least 2 first insns sha256_process_block64_shaNI: - movu128 76+0*16(%eax), STATE1 /* DCBA (msb-to-lsb: 3,2,1,0) */ - movu128 76+1*16(%eax), STATE0 /* HGFE */ + movu128 76+0*16(%eax), XMMTMP /* DCBA (msb-to-lsb: 3,2,1,0) */ + movu128 76+1*16(%eax), STATE1 /* HGFE */ /* shufps takes dwords 0,1 from *2nd* operand, and dwords 2,3 from 1st one */ - mova128 STATE0, XMMTMP - shufps SHUF(1,0,1,0), STATE1, STATE0 /* ABEF */ - shufps SHUF(3,2,3,2), STATE1, XMMTMP /* CDGH */ - mova128 XMMTMP, STATE1 + mova128 STATE1, STATE0 + shufps SHUF(1,0,1,0), XMMTMP, STATE0 /* ABEF */ + shufps SHUF(3,2,3,2), XMMTMP, STATE1 /* CDGH */ /* XMMTMP holds flip mask from here... */ mova128 PSHUFFLE_BSWAP32_FLIP_MASK, XMMTMP diff --git a/libbb/hash_md5_sha256_x86-64_shaNI.S b/libbb/hash_md5_sha256_x86-64_shaNI.S index bc063b9..4663f75 100644 --- a/libbb/hash_md5_sha256_x86-64_shaNI.S +++ b/libbb/hash_md5_sha256_x86-64_shaNI.S @@ -42,13 +42,12 @@ .balign 8 # allow decoders to fetch at least 2 first insns sha256_process_block64_shaNI: - movu128 80+0*16(%rdi), STATE1 /* DCBA (msb-to-lsb: 3,2,1,0) */ - movu128 80+1*16(%rdi), STATE0 /* HGFE */ + movu128 80+0*16(%rdi), XMMTMP /* DCBA (msb-to-lsb: 3,2,1,0) */ + movu128 80+1*16(%rdi), STATE1 /* HGFE */ /* shufps takes dwords 0,1 from *2nd* operand, and dwords 2,3 from 1st one */ - mova128 STATE0, XMMTMP - shufps SHUF(1,0,1,0), STATE1, STATE0 /* ABEF */ - shufps SHUF(3,2,3,2), STATE1, XMMTMP /* CDGH */ - mova128 XMMTMP, STATE1 + mova128 STATE1, STATE0 + shufps SHUF(1,0,1,0), XMMTMP, STATE0 /* ABEF */ + shufps SHUF(3,2,3,2), XMMTMP, STATE1 /* CDGH */ /* XMMTMP holds flip mask from here... */ mova128 PSHUFFLE_BSWAP32_FLIP_MASK(%rip), XMMTMP |